| A 10Gb_s combined equalizer in 0.18μm CMOS technology for backplane communication |
| 张明科;Hu Qingsheng; |
| 关键词：analog equalizer;decision feedback equal |
| 主要内容：This paper presents a 10Gb/s high-speed equalizer as the front-end of a receiver for backplane communication.The equaliz |
| 《High Technology Letters》 2015,21(02):205-211 |
| 全文下载请进入http://hightech.stlib.cn/tpi_1/sysasp/include/index.asp |
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